AK4112A |
RFQ for AK4112A Required Field |
 |
| Product | Manufacturers | Pack | D/C |
| AK4112A | - | SSOP | 2005 |
Features |
| Supports AES/EBU, IEC958, S/PDIF, EIAJ CP1201Low jitter Analog PLLPLL Lock Range : 22k~108kHzClock Source: PLL or X'tal4 channel Receivers input and 1 through transmission outputAuxiliary digital inputDeemphasis for 32kHz, 44.1kHz, 48kHz and 96kHzDedicated Detect Pins ` Non-PCM Bit Stream Detect Pin ` Validity Flag Detect Pin ` 96kHz Sampling Detect Pin ` Unlock & Parity Error Detect PinSupports up to 24bit Audio Data FormatAudio I/F: Master or Slave Mode32bits Channel Status BufferBurst Preamble bit Pc, Pd Buffer for Non-PCM bit streamSerial P I/FTwo Master Clock Outputs:128fs/256fs/512fsOperating Voltage: 2.7 to 3.6V with 5V toleranceSmall Package: 28pin VSOPTa: 40~85°C |
| Parameter |
Symbol |
min |
max |
Units | |
| Power Supplies |
Analog Digital Input Buffer |AVSS-DVSS| (Note 2) |
AVDD |
-0.3 -0.3 -0.3 - |
4.6 4.6 6.0 0.3 |
V V V V |
| Input Current, Any Pin Except Supplies |
IIN |
- |
±10 |
mA | |
| Input Voltage (Except XTI pin) Input Voltage (XTI pin) |
VIN VINX |
-0.3
-0.3 |
TVDD+0.3 DVDD+0.3 |
V
V | |
| Ambient Temperature (powered applied) |
Ta |
-40 |
85 |
°C | |
| Storage Temperature |
Tstg |
-65 |
150 |
°C | |
